The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2021

Filed:

Oct. 22, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Yun Li, Fremont, CA (US);

Kishore Kumar Muchherla, Fremont, CA (US);

Peter Feeley, Boise, ID (US);

Ashutosh Malshe, Fremont, CA (US);

Daniel J. Hubbard, Boise, ID (US);

Christopher S. Hale, Boise, ID (US);

Kevin R. Brandt, Boise, ID (US);

Sampath K. Ratnam, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/02 (2006.01); G06F 12/0891 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0253 (2013.01); G06F 12/0891 (2013.01); G06F 2212/1044 (2013.01);
Abstract

A memory system includes: a memory array including a plurality of memory cells, the plurality of memory cells including a plurality of cache memory cells; and a controller coupled to the memory array, the controller configured to: track usage of a first subset of the plurality of cache memory cells operating in a single-level cell (SLC) mode, wherein the tracking includes monitoring for an idle time event; and designate a storage mode for a second subset of the plurality of cache memory cells based on the tracked usage of the first subset, wherein the storage mode determines a storage density to be used for data writes.


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