The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2021

Filed:

Jan. 22, 2018
Applicant:

Via Labs, Inc., New Taipei, TW;

Inventors:

Terrance Shiyang Shih, Milpitas, CA (US);

Chin-Sung Hsu, New Taipei, TW;

Assignee:

VIA LABS, INC., New Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 12/10 (2016.01); G06F 8/65 (2018.01); G06F 8/654 (2018.01);
U.S. Cl.
CPC ...
G06F 9/45504 (2013.01); G06F 8/65 (2013.01); G06F 8/654 (2018.02); G06F 12/10 (2013.01); G06F 2212/1041 (2013.01); G06F 2212/151 (2013.01); G06F 2212/202 (2013.01);
Abstract

An electronic apparatus and an operation method thereof are provided. The electronic apparatus includes a nonvolatile memory, a first integrated circuit and a second integrated circuit. The nonvolatile memory stores the first firmware code of the first integrated circuit and the second firmware code of the second integrated circuit. The first integrated circuit is coupled to a memory access interface of the nonvolatile memory to read the first firmware code and the second firmware code. The first integrated circuit has an emulation memory access interface to emulate an emulation memory. The second integrated circuit is coupled to the emulation memory access interface of the first integrated circuit. The second integrated circuit reads the second firmware code from the first integrated circuit via the emulation memory access interface.


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