The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 13, 2021
Filed:
Sep. 30, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Patrick Lu, Chandler, AZ (US);
Karthik Kumar, Chandler, AZ (US);
Thomas Willhalm, Sandhausen, DE;
Francesc Guim Bernat, Barcelona, ES;
Martin P. Dimitrov, Chandler, AZ (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 9/30 (2018.01); G06F 12/0811 (2016.01); G06F 12/0862 (2016.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30047 (2013.01); G06F 9/30043 (2013.01); G06F 9/30185 (2013.01); G06F 9/383 (2013.01); G06F 12/0811 (2013.01); G06F 12/0862 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/205 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/2024 (2013.01); G06F 2212/6028 (2013.01);
Abstract
An apparatus is described. The apparatus includes main memory control logic circuitry comprising prefetch intelligence logic circuitry. The prefetch intelligence circuitry to determine, from a read result of a load instruction, an address for a dependent load that is dependent on the read result and direct a read request for the dependent load to a main memory to fetch the dependent load's data.