The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2021

Filed:

Aug. 16, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Fabio Carta, Pleasantville, NY (US);

Matthew J. BrightSky, Armonk, NY (US);

Bahman Hekmatshoartabari, White Plains, NY (US);

Asit Ray, Baldwin Place, NY (US);

Wanki Kim, Chappaqua, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 21/3213 (2006.01); H01L 45/00 (2006.01); H01L 29/04 (2006.01); H01L 29/16 (2006.01); H01L 29/861 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2409 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02573 (2013.01); H01L 21/02631 (2013.01); H01L 21/02675 (2013.01); H01L 21/30604 (2013.01); H01L 21/32133 (2013.01); H01L 27/2463 (2013.01); H01L 29/04 (2013.01); H01L 29/16 (2013.01); H01L 29/6609 (2013.01); H01L 29/8615 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/1675 (2013.01);
Abstract

A method of fabricating an access device in a crosspoint memory array structure during BEOL processing includes: forming at least a first doped semiconductor layer on an upper surface of a first conductive layer, the first doped semiconductor layer being in electrical connection with the first conductive layer; exposing at least a portion of the first doped semiconductor layer to a directed energy source to cause localized annealing in the first doped semiconductor layer to activate a dopant of a first conductivity type in the first doped semiconductor layer, thereby converting at least a portion of the first doped semiconductor layer into a polycrystalline layer; forming a second conductive layer over a least a portion of the first doped semiconductor layer; and etching the first doped semiconductor layer and the first and second conductive layers to form an access device that is self-aligned with the first and second conductive layers.


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