The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 2021

Filed:

Oct. 17, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Seiji Narui, Sagamihara, JP;

Yuki Ebihara, Chofu, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 5/06 (2006.01); H01L 27/108 (2006.01); G11C 11/4074 (2006.01); G11C 19/08 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10814 (2013.01); G06F 5/06 (2013.01); G11C 11/4074 (2013.01); G11C 19/0875 (2013.01); G11C 19/287 (2013.01);
Abstract

Apparatuses including a first-in first-out circuit are described. An example apparatus includes: a first-in first-out circuit including a first latch, a second latch and a logic circuit coupled in series. The first latch receives first data and latches the first data responsive to a first input pointer signal. The second latch receives the latched first data from the first latch and latches the received first data responsive to a second input pointer signal that has a different phase from the first input pointer signal and thus provides a second data. The logic circuit receives the second data and an output pointer signal and further provides an output data responsive to the output pointer signal.


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