The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Mar. 12, 2019
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Vibhor Jain, Essex Junction, VT (US);

Joan Josep Giner de Haro, Singapore, SG;

Qizhi Liu, Lexington, MA (US);

You Qian, Singapore, SG;

Humberto Campanella Pineda, Singapore, SG;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/165 (2006.01); H01L 29/737 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 23/528 (2006.01); H01L 21/768 (2006.01); G01N 27/414 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7371 (2013.01); H01L 21/76802 (2013.01); H01L 23/5283 (2013.01); H01L 29/0649 (2013.01); H01L 29/165 (2013.01); H01L 29/66242 (2013.01); G01N 27/4145 (2013.01);
Abstract

Transistor-based sensors and fabrication methods for a transistor-based sensor. A semiconductor layer is arranged over a substrate, and an interconnect structure is arranged over the semiconductor layer and the substrate. The semiconductor layer includes first sections composed of a semiconductor material, second sections composed of the semiconductor material, and cavities. The first sections have an alternating arrangement with the second sections in a lateral direction. The semiconductor material of the first sections is polycrystalline, and the semiconductor material of the second sections is single-crystal. First and second openings each extend in a vertical direction through the metallization levels of the interconnect structure to the semiconductor layer or through the substrate to the semiconductor layer. The first opening defines a first fluid inlet coupled to the cavities, and the second opening defines a first fluid outlet coupled to the cavities.


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