The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 2021
Filed:
Oct. 31, 2018
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Susumu Takahashi, Kanagawa, JP;
Hiroki Fujisawa, Kanagawa, JP;
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/42 (2006.01); G11B 20/18 (2006.01); G11C 8/10 (2006.01); G11C 7/10 (2006.01); G11C 8/12 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G11B 20/1833 (2013.01); G11C 7/1009 (2013.01); G11C 8/10 (2013.01); G11C 8/12 (2013.01); G11C 2216/22 (2013.01);
Abstract
Systems and methods related to memory devices that may perform error check and correct (ECC) functionality. The systems and methods may employ ECC logic that may be shared between two or more banks. The ECC logic may be used to perform memory operations such as read, write, and masked-write operations, and may increase reliability of storage data.
Quick Actions:
Takahashi, Susumu. (2021). Shared error check and correct logic for multiple data banks (U.S. Patent No. 10957413). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10957413
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile