The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Mar. 29, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyun-sung Shin, Seoul, KR;

Dae-Jeong Kim, Seoul, KR;

Ik-Joon Choi, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01); G11C 11/408 (2006.01); G11C 11/4091 (2006.01); G11C 11/406 (2006.01); G06F 3/06 (2006.01); G11C 17/18 (2006.01); G11C 17/16 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4087 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G11C 11/406 (2013.01); G11C 11/4085 (2013.01); G11C 11/4091 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01);
Abstract

According to an exemplary embodiment, a memory device may include a memory cell array that includes memory cells connected to word lines arranged in sequential order depending on a sequential change of a row address, a row decoder that, for each row address input to the row decoder, scrambles a first bit of the row address and a second bit of the row address depending on a selection signal, thereby forming a scrambled row address, decodes the scrambled row address, and selects a word line from the word lines based on the scrambled row address, and an anti-fuse array that includes an anti-fuse in which a logical value of the selection signal is programmed. A first word line and a second word line of the word lines may be adjacent to each other, and a difference between a first value of the row address corresponding to the first word line and a second value of the row address corresponding to the second word line may be a value corresponding to the first bit.


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