The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 2021

Filed:

Dec. 10, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Marco Dallabora, Melegnano, IT;

Emanuele Confalonieri, Lesmo, IT;

Paolo Amato, Pagazzano, IT;

Daniele Balluchi, Cernusco Sul Naviglio, IT;

Danilo Caraccio, Buonalbergo, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/20 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2094 (2013.01); G06F 3/061 (2013.01); G06F 3/064 (2013.01); G06F 3/0604 (2013.01); G06F 3/0608 (2013.01); G06F 3/0634 (2013.01); G06F 3/0647 (2013.01); G06F 3/0659 (2013.01); G06F 3/0685 (2013.01); G06F 3/0688 (2013.01);
Abstract

The present disclosure includes apparatuses and methods related to hybrid memory management. An example apparatus can include a first memory array, a number of second memory arrays, and a controller coupled to the first memory array and the number of second memory arrays configured to execute a write operation, wherein execution of the write operation writes data to the first memory array starting at a location indicated by a write cursor, and place the write cursor at an updated location in the first memory array upon completing execution of the write operation, wherein the updated location is a next available location in the first memory array.


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