Dual loop bias circuit with offset compensation

Abstract

Within a modulator driver, different blocks are employed, e.g. a buffer, one or more variable gain amplifiers (VGA), and a final driver stage. Each of these blocks has an optimum bias point for best performance; however, interconnecting the blocks requires sharing the DC bias points in their interface, which does not necessarily match the optimum performance bias point of each block. Accordingly, a first offset feedback loop extending from reference points after a selected one of the blocks to an input of one of the blocks. The first offset feedback loop includes current sources capable of delivering a variable current to the input of the selected block in order to compensate any offset in an amplified differential input electrical signal measured at the reference points. A first bias feedback loop is also provided, including a current sinker for subtracting excess current introduced in the first offset compensation feedback loop.