The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2021

Filed:

Nov. 04, 2019
Applicants:

Abb Schweiz Ag, Baden, CH;

Audi Ag, Ingolstadt, DE;

Inventor:

Fabian Mohn, Ennetbaden, CH;

Assignees:

ABB Schweiz AG, Baden, CH;

AUDI AG, Ingolstadt, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/367 (2006.01); H01L 23/498 (2006.01); H01L 25/16 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3121 (2013.01); H01L 21/4853 (2013.01); H01L 21/565 (2013.01); H01L 23/3675 (2013.01); H01L 23/49861 (2013.01); H01L 24/48 (2013.01); H01L 25/162 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48227 (2013.01); H01L 2924/19107 (2013.01); H01L 2924/30107 (2013.01);
Abstract

A power semiconductor module includes a substrate with a metallization layer; at least one power semiconductor chip bonded to the substrate; and a mold encapsulation partially encapsulating the semiconductor chip and the substrate; the mold encapsulation includes at least one window exposing a terminal area of the metallization layer; and a border part of the mold encapsulation between the window and a border of the substrate has a height over the substrate smaller than a maximal height of a central part of the mold encapsulation.


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