The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 2021

Filed:

Jun. 14, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Jeffrey L. McVay, El Dorado Hills, CA (US);

Samuel E. Bradshaw, Sacramento, CA (US);

Justin Eno, El Dorado Hills, CA (US);

Assignee:

MICRON TECHNOLOGY, INC., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 29/52 (2006.01); G11C 16/10 (2006.01); G11C 16/30 (2006.01); G11C 16/26 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3431 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 29/52 (2013.01); G11C 16/0483 (2013.01);
Abstract

Exemplary methods, apparatuses, and systems include a controller to manage memory proximity disturb. The controller identifies a first memory location in response to an access of a second memory location, the first memory location storing a first value. The controller updates a first disturb value by a first amount, the first disturb value representing a cumulative disturb effect on the first value in the first memory location by accesses to a first plurality of memory locations proximate to the first memory location, the first plurality of memory locations including the second memory location.


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