The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2021

Filed:

Mar. 12, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jung-Gun You, Gyeonggi-do, KR;

Chang-Hee Kim, Suwon-si, KR;

Sung-Il Park, Suwon-si, KR;

Dong-Hun Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 21/8238 (2006.01); H01L 23/532 (2006.01); H01L 21/308 (2006.01); H01L 29/423 (2006.01); H01L 29/165 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7827 (2013.01); H01L 21/3083 (2013.01); H01L 21/823842 (2013.01); H01L 21/823885 (2013.01); H01L 23/5329 (2013.01); H01L 29/0649 (2013.01); H01L 29/1037 (2013.01); H01L 29/4232 (2013.01); H01L 29/66553 (2013.01); H01L 29/66666 (2013.01); H01L 21/3081 (2013.01); H01L 21/823481 (2013.01); H01L 21/823487 (2013.01); H01L 29/165 (2013.01);
Abstract

A vFET includes a first impurity region doped with first impurities at an upper portion of the substrate. A first diffusion control pattern is formed on the first impurity region. The first diffusion control pattern is configured to control the diffusion of the first impurities. A channel extends in a vertical direction substantially orthogonal to an upper surface of the substrate. A second impurity region is doped with second impurities on the channel. A second diffusion control pattern is between the channel and the second impurity region. The second diffusion control pattern is configured to control the diffusion of the second impurities. A gate structure is adjacent to the channel.


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