The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2021

Filed:

Oct. 25, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Xin Zhang, Yorktown Heights, NY (US);

Ko-Tao Lee, Yorktown Heights, NY (US);

Todd E. Takken, Brewster, NY (US);

Paul W. Coteus, Yorktown Heights, NY (US);

Andrew Ferencz, Southborough, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/06 (2006.01); H01L 29/20 (2006.01); H01L 29/66 (2006.01); H01L 21/768 (2006.01); H01L 21/8258 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 21/02 (2006.01); H01L 23/528 (2006.01); H01L 27/085 (2006.01); H03K 17/687 (2006.01); H01L 21/311 (2006.01); H01L 29/417 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0605 (2013.01); H01L 21/0254 (2013.01); H01L 21/02381 (2013.01); H01L 21/76895 (2013.01); H01L 21/8258 (2013.01); H01L 21/84 (2013.01); H01L 23/528 (2013.01); H01L 27/085 (2013.01); H01L 27/1203 (2013.01); H01L 29/2003 (2013.01); H01L 29/6656 (2013.01); H01L 29/66446 (2013.01); H01L 21/0217 (2013.01); H01L 21/02458 (2013.01); H01L 21/31116 (2013.01); H01L 29/41766 (2013.01); H01L 29/778 (2013.01); H03K 17/6871 (2013.01);
Abstract

A method for fabricating a semiconductor device includes, for a substrate having a first region protected by a cap layer, forming a first device on a second region of the substrate. The substrate includes an insulator layer disposed between a first semiconductor layer and a second semiconductor layer each including a first semiconductor material. The method further includes forming a second device on the first region, including forming one or more transistors each having a channel formed from a second semiconductor material different from the first semiconductor material.


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