The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2021

Filed:

Apr. 30, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Tin Poay Chuah, Penang, MY;

Yew San Lim, Penang, MY;

Boon Ping Koh, Penang, MY;

Phaik Kiau Tan, Penang, MY;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/02 (2006.01); H05K 3/36 (2006.01); H05K 1/14 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0216 (2013.01); H05K 1/14 (2013.01); H05K 3/368 (2013.01); H05K 2201/058 (2013.01);
Abstract

A folded circuit board includes a first circuit board and a second circuit board. The first circuit board and second circuit board are coupled together through a flexible interconnect. One or more folding guides are coupled to one of the first circuit board or second circuit board. The one or more folding guides extend beyond a first edge of the one of the first circuit board or second circuit board. The one or more folding guides include a curved sidewall configured to guide the flexible interconnect when the first circuit board is folded over the second circuit board. In one embodiment, the one or more folding guides are grounded to reduce EMI emissions.


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