The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2021

Filed:

Dec. 27, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ramon Sanchez, Madrid, ES;

Kameran Azadet, San Ramon, CA (US);

Martin Clara, Santa Clara, CA (US);

Daniel Gruber, St. Andrae, AT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03K 3/84 (2006.01); G06F 7/58 (2006.01); H04B 1/40 (2015.01); H04W 88/08 (2009.01);
U.S. Cl.
CPC ...
H03M 1/66 (2013.01); G06F 7/584 (2013.01); H03K 3/84 (2013.01); H04B 1/40 (2013.01); H04W 88/08 (2013.01);
Abstract

A digital-to-analog converter is provided. The digital-to-analog converter comprises an input configured to receiving a first digital control code for controlling a plurality of digital-to-analog converter cells. Further, the digital-to-analog converter comprises a code converter circuit configured to converter the first digital control code to a second digital control code. Further, the digital-to-analog converter comprises a shift code generation circuit configured to generate a shift code based on a code difference between the first digital control code and a third digital control code. The digital-to-analog converter additionally comprises a bit-shifter circuit configured to bit-shift the second digital control code based on the shift code in order to obtain a modified second digital control code. The digital-to-analog converter comprises a cell activation circuit configured to selectively activate one or more of the plurality of digital-to-analog converter cells based on the modified second digital control code. Each activated digital-to-analog converter cell is configured to output a respective cell output signal. Further, the digital-to-analog converter comprises an output configured to output an analog output signal based on the cell output signals.


Find Patent Forward Citations

Loading…