The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2021

Filed:

Apr. 21, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Daniele Vimercati, El Dorado Hills, CA (US);

Stefan Frederik Schippers, Peschiera del Garda, IT;

Xinwei Guo, Folsom, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/24 (2006.01); G11C 11/4091 (2006.01); G11C 11/408 (2006.01); H03F 3/45 (2006.01); G11C 11/22 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G11C 11/221 (2013.01); G11C 11/2257 (2013.01); G11C 11/2273 (2013.01); G11C 11/4085 (2013.01); H03F 3/45071 (2013.01); H03F 2200/231 (2013.01); H03F 2200/396 (2013.01); H03F 2200/48 (2013.01); H03F 2203/45156 (2013.01);
Abstract

Methods, systems, and devices for differential amplifier schemes for sensing memory cells are described. In one example, a memory apparatus may include a differential amplifier having a first input node configured to be coupled with a memory cell and having an output node configured to be coupled with a sense component. In some examples, the memory apparatus may also include a capacitor having a first node coupled with the first input node, and a first switching component configured to selectively couple a second node of the capacitor with the output node. The differential amplifier may configured such that a current at the output node is proportional to a difference between a voltage at the first input node of the differential amplifier and a voltage at the second input node of the differential amplifier.


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