The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2021

Filed:

Sep. 14, 2019
Applicants:

Dong LI, San Ramon, CA (US);

GE Yi, San Ramon, CA (US);

Inventors:

Dong Li, San Ramon, CA (US);

Ge Yi, San Ramon, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); G02B 6/42 (2006.01); H01L 25/04 (2014.01); G02B 1/00 (2006.01);
U.S. Cl.
CPC ...
G02B 6/12019 (2013.01); G02B 1/005 (2013.01); G02B 6/12014 (2013.01); G02B 6/4257 (2013.01); H01L 25/041 (2013.01);
Abstract

A CMOS compatible heterogeneously integrated material platform for photonic integrated circuitry is invented. The material platform has SiO2 as cladding material, at least a bottom layer made of moderate refractive index (contrast) material(s), a bonded single crystal Si layer transfer from either a SOI wafer or a ion implanted single crystal Si wafer ready for ion cut split on top of the bottom layer, and some devices enabling light coupling between the devices made within these two layers. The invention provides a great material platform to offer a full set of photonic building blocks for all sorts of different applications such as photonic circuitry for optical neural network, quantum computing, telecommunication, data communication, optical switching, optical sensing, passive and/or active Si optical interposer with its size even bigger than lithography step field.


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