The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2021

Filed:

Aug. 21, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hae-in Jung, Suwon-si, KR;

Moon-young Jeong, Suwon-si, KR;

Joon Han, Hwaseong-si, KR;

Satoru Yamada, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 27/02 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 29/417 (2006.01); H01L 27/11573 (2017.01); H01L 27/108 (2006.01); H01L 21/8234 (2006.01); H01L 21/306 (2006.01); H01L 27/11526 (2017.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1037 (2013.01); H01L 21/30604 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 27/0207 (2013.01); H01L 27/0886 (2013.01); H01L 27/10897 (2013.01); H01L 27/11526 (2013.01); H01L 27/11573 (2013.01); H01L 29/0847 (2013.01); H01L 29/4175 (2013.01); H01L 29/41791 (2013.01); H01L 29/42364 (2013.01);
Abstract

Provided are a multi-direction channel transistor having a gate having an increased effective width and a multi-direction channel, and a semiconductor device including the multi-direction channel transistor, wherein the multi-direction channel transistor includes at least one fin on an active region on a substrate and disposed adjacent to a recess extending in a first direction; a gate line extending in a second direction crossing the first direction and covering at least a portion of the at least one fin and the recess; source/drain regions on the active region at both sides of the gate line; and a channel region in the active region under the gate line between the source/drain regions, wherein the first direction is diagonal to the second direction, and a dielectric film under the gate line has substantially the same thickness on both the at least one fin and the recess.


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