The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2021

Filed:

Oct. 17, 2016
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Li-Che Chen, Pingtung County, TW;

Te-Yuan Wu, Hsinchu, TW;

Chia-Huei Lin, New Taipei, TW;

Hui-Min Wu, Hsinchu County, TW;

Kun-Che Hsieh, Tainan, TW;

Kuan-Yu Wang, New Taipei, TW;

Chung-Yi Chiu, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81B 3/00 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
B81B 3/0075 (2013.01); B81C 1/00555 (2013.01); B81C 1/00563 (2013.01); B81C 1/00587 (2013.01); B81C 1/00595 (2013.01); B81C 1/00801 (2013.01); B81B 2201/0264 (2013.01); B81B 2203/0127 (2013.01); B81B 2207/07 (2013.01); B81C 1/00246 (2013.01); B81C 2201/014 (2013.01); B81C 2203/0714 (2013.01); B81C 2203/0735 (2013.01);
Abstract

A MEMS structure includes a substrate, an inter-dielectric layer on a front side of the substrate, a MEMS component on the inter-dielectric layer, and a chamber disposed within the inter-dielectric layer and through the substrate. The chamber has an opening at a backside of the substrate. An etch stop layer is disposed within the inter-dielectric layer. The chamber has a ceiling opposite to the opening and a sidewall joining the ceiling. The sidewall includes a portion of the etch stop layer.


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