The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Sep. 28, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Albert Sutono, Chandler, AZ (US);

Xiaoning Ye, Portland, OR (US);

Jimmy Hsu, Taoyuan, TW;

Daniel Hull, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 3/34 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 23/498 (2006.01); H05K 3/28 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0231 (2013.01); H01L 23/49816 (2013.01); H01L 23/5386 (2013.01); H01L 24/09 (2013.01); H05K 1/0216 (2013.01); H05K 1/0243 (2013.01); H05K 3/3452 (2013.01); H01L 2223/6627 (2013.01); H01L 2223/6638 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/145 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/1438 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/30105 (2013.01); H01L 2924/30107 (2013.01); H05K 1/024 (2013.01); H05K 1/0245 (2013.01); H05K 3/28 (2013.01); H05K 2201/09872 (2013.01);
Abstract

Apparatuses, systems and methods associated with dielectric coatings for printed circuit boards are disclosed herein. In embodiments, a printed circuit board (PCB) includes a substrate, microstrip conductors located on a surface of the substrate, a solder mask covering the surface of the substrate and the microstrip conductors, and a dielectric coating located on the solder mask, the dielectric coating on an opposite side of the solder mask from the microstrip conductors, wherein a thickness of the dielectric coating is selected to cause a ratio of capacitive coupling to self capacitance to be approximately equal to a ratio of inductive coupling to self inductance for each microstrip conductor of the microstrip conductors, where the thickness may be determined based on a specific methodology including simulations. Other embodiments may be described and/or claimed.


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