The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 16, 2021
Filed:
Jun. 28, 2018
Applicant:
Western Digital Technologies, Inc., San Jose, CA (US);
Inventors:
Toshiki Hirano, San Jose, CA (US);
Gokul Kumar, San Jose, CA (US);
Akio Nishida, Nagoya, JP;
Yan Li, Milpitas, CA (US);
Michael Mostovoy, San Ramon, CA (US);
Assignee:
Western Digital Technologies, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01); H01L 21/66 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 25/065 (2006.01); H01L 23/522 (2006.01); H01L 23/58 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 21/561 (2013.01); H01L 21/78 (2013.01); H01L 22/14 (2013.01); H01L 23/481 (2013.01); H01L 24/05 (2013.01); H01L 24/48 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/585 (2013.01); H01L 24/49 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/49176 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06562 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1438 (2013.01); H01L 2924/14511 (2013.01);
Abstract
A semiconductor device is disclosed including one or more integrated memory modules. Each integrated memory module may include a pair of semiconductor die, which together, operate as a single, integrated memory. In one example, the first die may include the memory cell array and the second die may include the logic circuit such as CMOS integrated circuits. In one example, the first die may be flip-chip bonded to the second die.