The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2021

Filed:

Jul. 01, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Umberto Siciliani, Rubano, IT;

Giulio Giuseppe Marotta, Contigliano, IT;

Tommaso Vali, Marine, IT;

Luca De Santis, Avezzano, IT;

Agostino Macerola, San Benedetto dei Marsi, IT;

Violante Moshciano, Bacoli, IT;

Luigi Pilolli, L'Aquila, IT;

Giovanni Santin, Rieti, IT;

Michele Incarnati, Avezzano, IT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 12/0802 (2016.01); G06F 12/04 (2006.01); G06F 12/1009 (2016.01); G11C 16/06 (2006.01); G11C 11/56 (2006.01); G11C 16/26 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0238 (2013.01); G06F 12/0246 (2013.01); G06F 12/04 (2013.01); G06F 12/0802 (2013.01); G06F 12/1009 (2013.01); G11C 11/5628 (2013.01); G11C 11/5642 (2013.01); G11C 16/06 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7202 (2013.01); G06F 2212/7203 (2013.01); G11C 2211/5641 (2013.01);
Abstract

Technology for a memory device operable to program memory cells in the memory device is described. The memory device can include a plurality of memory cells and a memory controller. The memory controller can receive a page of data. The memory controller can segment the page of data into a group of data segments. The memory controller can program the group of data segments to memory cells in the plurality of memory cells that are associated with an inhibit tile group (ITG). The group of data segments for the page of data can be programmed using all bits included in each of the memory cells associated with the ITG.


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