The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2021

Filed:

Nov. 14, 2017
Applicant:

Stmicroelectronics International N.v., Schiphol, NL;

Inventor:

Prashant Singh, Greater Noida, IN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 1/10 (2006.01); H03K 5/24 (2006.01); H03K 19/20 (2006.01); H03K 3/027 (2006.01); H03K 19/0185 (2006.01); H03H 11/04 (2006.01); H04L 25/02 (2006.01); H03H 11/12 (2006.01);
U.S. Cl.
CPC ...
H04B 1/1027 (2013.01); H03H 11/04 (2013.01); H03K 3/027 (2013.01); H03K 5/24 (2013.01); H03K 19/018528 (2013.01); H03K 19/20 (2013.01); H04L 25/0292 (2013.01); H03H 11/1213 (2013.01);
Abstract

A circuit has a first window comparator determining whether a signal at a first input has a voltage higher than a first threshold but lower than a second threshold, and a second window comparator determining whether a signal at a second input has a voltage higher than the first threshold but lower than the second threshold. A logic circuit generates pulses in response to either the first window comparator determining that the signal at the first differential input has a voltage higher than the first threshold but lower than the second threshold or the second window comparator determining that the signal at the second input has a voltage higher than the first threshold but lower than the second threshold. A filter circuit receives the pulses from the logic circuit and generates a flag indicating that the signal is invalid, based upon pulses received from the logic circuit.


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