The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2021

Filed:

Apr. 20, 2018
Applicant:

Alta Devices, Inc., Sunnyvale, CA (US);

Inventors:

Brendan M. Kayes, Los Gatos, CA (US);

Hui Nie, Cupertino, CA (US);

Isik C. Kizilyalli, San Francisco, CA (US);

Assignee:

ALTA DEVICES, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0735 (2012.01); H01L 31/0224 (2006.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 31/0735 (2013.01); H01L 31/022441 (2013.01); H01L 31/1896 (2013.01); Y02E 10/52 (2013.01); Y02E 10/544 (2013.01);
Abstract

Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer.


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