The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 2021
Filed:
Jan. 31, 2019
Applicant:
United Microelectronics Corp., Hsinchu, TW;
Inventor:
Chin-Chin Tsai, Tainan, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11568 (2017.01); H01L 29/66 (2006.01); H01L 29/792 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11568 (2013.01); H01L 29/40117 (2019.08); H01L 29/66833 (2013.01); H01L 29/792 (2013.01);
Abstract
A structure of memory cell includes a memory gate structure, disposed on a substrate, wherein the substrate has an indent region aside the memory gate structure. A selection gate structure is disposed on the substrate at the indent region aside the memory gate structure. A first insulation layer is at least disposed between the memory gate structure and selection gate structure.
Tsai, Chin-Chin. (2021). Structure of memory cell and method for fabricating the same (U.S. Patent No. 10916555). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10916555
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile