The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2021

Filed:

Dec. 19, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Robert P. Adler, Santa Clara, CA (US);

Lichen Weng, Milpitas, CA (US);

Christopher C. Gianos, Sterling, MA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/46 (2006.01);
U.S. Cl.
CPC ...
H04L 12/462 (2013.01); H04L 12/4625 (2013.01);
Abstract

In an embodiment, a system on chip includes: a plurality of local networks having one or more local endpoints and a first router, where at least some of the one or more local endpoints of different local networks have non-unique port identifiers; at least one global network having one or more global endpoints and at least one second router, where the one or more global endpoints have unique port identifiers; and a plurality of transparent bridges to couple between one of the plurality of local networks and the at least one global network. Other embodiments are described and claimed.


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