The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2021

Filed:

Dec. 26, 2019
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Kazutaka Takizawa, Kanagawa, JP;

Yoshihisa Kojima, Kanagawa, JP;

Masaaki Niijima, Tokyo, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G11C 16/04 (2006.01); G11C 16/22 (2006.01); H01L 27/11582 (2017.01); G11C 11/56 (2006.01); H01L 27/11556 (2017.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 11/5642 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); G11C 16/22 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract

A memory system includes a nonvolatile memory and a controller. The nonvolatile memory includes memory cells at intersection locations of stacked word lines and a memory pillar passing through the word lines in a stacking direction, the word lines including a first group of word lines stacked above a second group of word lines. The controller reads data of a first memory cell in a first read mode and reads data of a second memory cell in a second read mode. The first memory cell is, and the second memory cell is not, at an intersection location of a word line that is in a boundary area of the first and second groups of word lines and the memory pillar. The boundary area is adjacent to a location of the memory pillar where a width of the memory pillar discontinuously changes along the stacking direction.


Find Patent Forward Citations

Takizawa, Kazutaka. (2021). Memory system and nonvolatile memory (U.S. Patent No. 10910068). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10910068

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…