The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2021

Filed:

Oct. 04, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Sinan Goktepeli, San Diego, CA (US);

George Pete Imthurn, San Diego, CA (US);

Sivakumar Kumarasamy, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 29/40 (2006.01); H01L 29/786 (2006.01); H04B 1/00 (2006.01); H04B 1/52 (2015.01); H01L 27/12 (2006.01); H04B 1/38 (2015.01);
U.S. Cl.
CPC ...
H01L 29/7824 (2013.01); H01L 21/76254 (2013.01); H01L 21/76264 (2013.01); H01L 27/1203 (2013.01); H01L 29/402 (2013.01); H01L 29/66681 (2013.01); H01L 29/78603 (2013.01); H01L 29/78624 (2013.01); H01L 29/78648 (2013.01); H04B 1/0064 (2013.01); H04B 1/52 (2013.01); H04B 1/38 (2013.01);
Abstract

An integrated circuit is described. The integrated circuit includes a laterally diffused metal oxide semiconductor (LDMOS) transistor. The LDMOS is on a first surface of an insulator layer of the integrated circuit. The LDMOS transistor includes a source region, a drain region, and a gate. The LDMOS transistor also includes a secondary well between the drain region and the gate. The secondary well has an opposite polarity from the drain region. The LDMOS transistor further includes a backside device on a second surface opposite the first surface of the insulator layer.


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