The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2021

Filed:

Nov. 28, 2018
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Doo Hwan Lee, Suwon-Si, KR;

Yong Hoon Kim, Suwon-si, KR;

Tae Je Cho, Suwon-si, KR;

Jin Won Lee, Suwon-Si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 23/49894 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/19103 (2013.01);
Abstract

A substrate having an embedded interconnect structure includes an interconnect structure including a circuit member including circuit layers and a passive device disposed in parallel with the circuit member and including an external electrode, and a printed circuit board including an insulating layer covering the interconnect structure, a first wiring layer disposed on the insulating layer, a first wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to an uppermost circuit layer, among the circuit layers, and a second wiring via penetrating through at least a portion of the insulating layer and electrically connecting the first wiring layer to the external electrode of the passive device. A top surface of the uppermost circuit layer, contacting the first wiring via, is coplanar with a top surface of the external electrode, contacting the second wiring via.


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