The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2021

Filed:

Dec. 27, 2017
Applicant:

Huawei Technologies Co., Ltd., Shenzhen, CN;

Inventors:

HuiLi Fu, Shenzhen, CN;

Shujie Cai, Shenzhen, CN;

Xiao Hu, Shenzhen, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/373 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3735 (2013.01); H01L 21/4853 (2013.01); H01L 21/4871 (2013.01); H01L 23/3135 (2013.01); H01L 23/538 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); H01L 23/373 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/48225 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19105 (2013.01);
Abstract

A chip package structure, including a substrate, multiple chips and multiple discrete devices that are packaged on an upper surface of the substrate, and a heat dissipation apparatus, where the heat dissipation apparatus includes an insulation layer and a thermally conductive layer that are laminated. The insulation layer completely encloses and adheres to outer surfaces of the multiple chips, outer surfaces of the multiple discrete devices, and the upper surface of the substrate and configured to conduct heat generated by the multiple chips and the multiple discrete devices to the thermally conductive layer and the substrate such that the heat generated by the multiple chips and the multiple discrete devices dissipated using the thermally conductive layer and the substrate.


Find Patent Forward Citations

Loading…