The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2021

Filed:

Sep. 22, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Yong Sung Cho, Hwaseong-si, KR;

Venkataramana Gangasani, Suwon-si, KR;

Hee Won Kim, Anyang-si, KR;

Tae Hui Na, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/408 (2006.01); G11C 11/409 (2006.01); G11C 29/00 (2006.01); G11C 7/04 (2006.01); G11C 11/4074 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4087 (2013.01); G11C 7/04 (2013.01); G11C 11/409 (2013.01); G11C 11/4074 (2013.01); G11C 29/842 (2013.01);
Abstract

A memory device includes a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines; a decoder circuit including a first bias circuit inputting a first bias voltage to a selected word line, and a second bias circuit inputting a second bias voltage to a selected bit line, a first switch element connected to the selected word line, and a second switch element connected between the first switch element and the first bias circuit; and a control logic configured to control the first and second switch elements, when a predetermined delay time elapses after the second bias voltage is input to the selected bit line. The control logic turns off the first switch element while the second switch element is turned on.


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