The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 2021

Filed:

Mar. 11, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Takashi Fukushima, Yokkaichi, JP;

Junya Fujita, Nagoya, JP;

Toshiharu Nagumo, Kuwana, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11573 (2017.01); H01L 27/11565 (2017.01); H01L 27/11578 (2017.01); H01L 27/1157 (2017.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11573 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 27/11578 (2013.01); H01L 29/40117 (2019.08);
Abstract

According to an embodiment, a semiconductor memory device includes a semiconductor substrate. The semiconductor substrate includes a first surface. A first semiconductor layer is provided on a first region of the first surface. A first transistor is provided on the first semiconductor layer. A second semiconductor layer is provided on a second region of the first surface. A second transistor is provided on the second semiconductor layer. A stacked body is provided on a third region of the first surface. The stacked body includes a plurality of conductors and a plurality of memory pillars. A first insulator is provided between the first semiconductor layer and the second semiconductor layer.


Find Patent Forward Citations

Loading…