The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2021

Filed:

Dec. 10, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

Stefan Tertinek, Linz, AT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/07 (2006.01); H03L 7/099 (2006.01); H03L 7/08 (2006.01); H03L 7/081 (2006.01); H03L 7/085 (2006.01); H03L 7/10 (2006.01); H03M 1/60 (2006.01); H03L 7/197 (2006.01);
U.S. Cl.
CPC ...
H03L 7/07 (2013.01); H03L 7/08 (2013.01); H03L 7/085 (2013.01); H03L 7/0814 (2013.01); H03L 7/0992 (2013.01); H03L 7/10 (2013.01); H03L 7/1976 (2013.01); H03L 2207/50 (2013.01); H03M 1/60 (2013.01);
Abstract

Systems, circuitries, and methods are described for phase-continuous shifting of a reference clock frequency from fto Nfor a DPLL that includes a DCO and a feedback loop that generates a feedback signal. The DPLL generates a local oscillator signal based on an analog reference signal having a reference clock frequency fand a digital reference signal having the reference clock frequency f. In one example, the method includes receiving a target time and at expiration of a first nonzero interval after the target time, generating a subsequent feedback signal having the target reference clock frequency Nf; at expiration of a second nonzero interval after the target time, generating a subsequent analog reference signal having the target reference clock frequency Nf; and at expiration of a third nonzero interval after the target time, generating a subsequent digital reference clock signal having the target reference clock frequency Nf.


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