The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2021

Filed:

Dec. 26, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Ankit Vashi, Milpitas, CA (US);

Harish Reddy Singidi, Fremont, CA (US);

Kishore Kumar Muchherla, Fremont, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 11/406 (2006.01); G11C 16/26 (2006.01); G11C 29/10 (2006.01); G06F 11/00 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3431 (2013.01); G06F 11/008 (2013.01); G11C 11/40615 (2013.01); G11C 11/40626 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/349 (2013.01); G11C 29/10 (2013.01); G11C 2211/406 (2013.01);
Abstract

A variety of applications can include systems and/or methods of optimizing results from scanning a memory device, where the memory device has stacked multiple reliability specifications. Information about a block of multiple blocks of a memory device can be logged, where the information is associated with a combination of reliability specifications. A refresh of the block can be triggered based on exceeding a threshold condition for the combination of reliability specifications.


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Vashi, Ankit. (2021). Scan optimization from stacking multiple reliability specifications (U.S. Patent No. 10892024). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10892024

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