The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2021

Filed:

May. 15, 2018
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Yuan Li, Austin, TX (US);

Eric Simard, Kanata, CA;

Xiao Sun, Austin, TX (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0653 (2013.01); G06F 3/0604 (2013.01); G06F 3/0673 (2013.01);
Abstract

A method, system, program control code, and hardware circuit are provided for predicting performance of an system-on-chip (SoC) () having a processor () and a master device () having shared access to a single-port memory () by activating a timer () in a Performance Monitoring Unit (PMU) () to measure a specified number of cycles of the processor in a defined measure instance and by activating a memory access counter () in the PMU to measure a first count of memory access requests to the single-port memory by the processor in the defined measure instance and to measure a second count of memory access requests to the single-port memory by the master device in the defined measure instance, so that the first and second counts are stored in memory.


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