The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Nov. 20, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Juntao Li, Cohoes, NY (US);

Chengwen Pei, Danbury, CT (US);

Geng Wang, Stormville, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/112 (2006.01); H01L 23/525 (2006.01); H01L 29/161 (2006.01); H01L 29/165 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 21/84 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11206 (2013.01); H01L 21/84 (2013.01); H01L 23/5252 (2013.01); H01L 29/0653 (2013.01); H01L 29/1054 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/66628 (2013.01); H01L 29/7848 (2013.01); H01L 29/7849 (2013.01); H01L 29/7851 (2013.01); H01L 21/845 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15787 (2013.01);
Abstract

A semiconductor device having transistors and anti-fuses integrated thereon includes a transistor region having a defect free monocrystalline semiconductor layer and a device channel for a transistor. The device also has an anti-fuse region including a defective semiconductor layer formed on an oxide of a portion of the surface of an epitaxial semiconductor layer over which the transistor is formed, the oxide having a thickness extending into the epitaxial semiconductor layer. It also has gate structures formed in the transistor region and in the anti-fuse region, where the defective semiconductor layer is programmable by an applied field on the gate structures in the anti-fuse region.


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