The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Aug. 28, 2017
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Gerald John Barkley, Oregon, WI (US);

Daniele Vimercati, El Dorado Hills, CA (US);

Pierguido Garofalo, San Donato M.se, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/02 (2006.01); G11C 8/12 (2006.01); G11C 16/08 (2006.01); G11C 7/10 (2006.01); G11C 16/26 (2006.01); G11C 16/10 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 5/025 (2013.01); G11C 7/1042 (2013.01); G11C 8/12 (2013.01); G11C 13/0004 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01);
Abstract

A plurality of block configurations may be employed for read while write operations. In one apparatus example, a plurality of block configurations may be employed. Block configurations may include an arrangement of similarly doped semiconductor switches. Block configurations may select a respective tile of a memory array, a particular memory cell of the respective tile, and select a memory operation to apply to the particular memory cell. Immediately adjacent block configurations within a particular slice of the memory array may be substantially mirrored and immediately adjacent block configurations in separate immediately adjacent slices of the memory array may be substantially similar. Similarly doped diffusion regions for similarly doped semiconductor switches in substantially mirrored block configurations may be arranged to electrically share a common potential signal value level. Other apparatus and methods are also disclosed.


Find Patent Forward Citations

Loading…