The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Aug. 30, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Bartholomew Blaner, Shelburne, VT (US);

Jay G. Heaslip, Williston, VT (US);

Robert D. Herzl, Windham, NH (US);

Jody B. Joyner, Austin, TX (US);

Jeffrey A. Stuecheli, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 12/0897 (2016.01); G06F 12/1009 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0897 (2013.01); G06F 12/023 (2013.01); G06F 12/1009 (2013.01); G06F 2212/507 (2013.01); G06F 2212/657 (2013.01);
Abstract

A method, computer program product, and a computer system are disclosed for processing information in a processor that in one or more embodiments includes setting a threshold number of free Effective to Real Address Translation (ERAT) cache entries in an ERAT cache; determining whether a total number of free ERAT cache entries is less than or equal to the threshold number of free ERAT cache entries; allocating, in response to determining that the total number of free entries is less than or equal to the threshold number, one or more active ERAT cache entries to be speculatively checked in to a memory management unit (MMU); and speculatively checking in the one or more active ERAT cache entries to the MMU.


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