The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Sep. 18, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Henry Litzmann Edwards, Garland, TX (US);

James Robert Todd, Plano, TX (US);

Binghua Hu, Plano, TX (US);

Xiaoju Wu, Dallas, TX (US);

Stephanie L. Hilbun, Garland, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7816 (2013.01); H01L 29/0865 (2013.01); H01L 29/0882 (2013.01); H01L 29/1095 (2013.01); H01L 29/4232 (2013.01); H01L 29/66681 (2013.01);
Abstract

Described examples include integrated circuits, drain extended transistors and fabrication methods therefor, including a multi-fingered transistor structure formed in an active region of a semiconductor substrate, in which a transistor drain finger is centered in a multi-finger transistor structure, a transistor body region laterally surrounds the transistor, an outer drift region laterally surrounds an active region of the semiconductor substrate, and one or more inactive or dummy structures are formed at lateral ends of the transistor finger structures.


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