The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Jul. 24, 2019
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventor:

Chen-Wei Pan, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/36 (2006.01); H01L 29/78 (2006.01); H01L 21/28 (2006.01); H01L 21/225 (2006.01); H01L 21/265 (2006.01); H01L 29/49 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/365 (2013.01); H01L 21/2253 (2013.01); H01L 21/26533 (2013.01); H01L 21/28035 (2013.01); H01L 21/28176 (2013.01); H01L 29/4916 (2013.01); H01L 29/78 (2013.01); H01L 29/0843 (2013.01);
Abstract

A method for manufacturing a semiconductor structure including following steps is provided. A dielectric layer is formed on a substrate. A polysilicon layer is formed on the dielectric layer. Ion implantation processes are performed to the polysilicon layer by using a fluorine dopant. Implantation depths of the ion implantation processes are different. A fluorine dopant concentration of the ion implantation process with a deeper implantation depth is smaller than a fluorine dopant concentration of the ion implantation process with a shallower implantation depth. After the ion implantation processes, a thermal process is performed to the polysilicon layer.


Find Patent Forward Citations

Loading…