The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2020
Filed:
Sep. 25, 2019
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Inventors:
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 21/336 (2006.01); H01L 27/24 (2006.01); G11C 11/16 (2006.01); G11C 13/00 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2436 (2013.01); G11C 11/1659 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 13/003 (2013.01); G11C 13/004 (2013.01); G11C 13/0069 (2013.01); H01L 45/1253 (2013.01); G11C 2013/0042 (2013.01); G11C 2013/0071 (2013.01); G11C 2013/0073 (2013.01); G11C 2013/0088 (2013.01); G11C 2213/71 (2013.01); G11C 2213/78 (2013.01); G11C 2213/79 (2013.01); G11C 2213/82 (2013.01);
Abstract
The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a control device arranged within a substrate and having a terminal. A first memory device is coupled between the terminal of the control device and a first bit-line. A second memory device is coupled between the terminal of the control device and a second bit-line.