The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Nov. 26, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Tsung-Han Tsai, Zhunan Township, TW;

Chun-Hao Chou, Tainan, TW;

Kuo-Cheng Lee, Tainan, TW;

Yung-Lung Hsu, Tainan, TW;

Yun-Wei Cheng, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 21/761 (2006.01); H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1463 (2013.01); H01L 21/761 (2013.01); H01L 23/58 (2013.01); H01L 27/1464 (2013.01); H01L 27/14607 (2013.01); H01L 27/14609 (2013.01); H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 27/14643 (2013.01); H01L 27/14683 (2013.01); H01L 27/14687 (2013.01); H01L 27/14689 (2013.01);
Abstract

Some embodiments relate to a device array including a plurality of devices arranged in a semiconductor substrate. A protection ring circumscribes an outer perimeter of the device array. The protection ring includes a first ring neighboring the device array, a second ring circumscribing the first ring and meeting the first ring at a first p-n junction, and a third ring circumscribing the second ring and meeting the second ring at a second p-n junction. The first ring has a first width, the second ring has a second width, and the third ring has a third width. At least two of the first width, the second width, and the third width are different from one another.


Find Patent Forward Citations

Loading…