Patterning integration scheme with trench alignment marks

Abstract

Methods are provided for patterning an active region formed in a semiconductor wafer. In one aspect, the methods generally include providing active regions and kerf regions between active regions in the semiconductor wafer, wherein the active regions and the kerf regions include a patterned dielectric layer, a metal conductor, and a liner layer between the dielectric layer and the metal conductor. An upper surface of the active regions and the kerf regions is planarized to form a planar surface. The metal conductor from the kerf regions is selectively removed to form a trench. An optically opaque layer is conformally deposited onto the semiconductor wafer to form a recessed alignment mark in the kerf regions. The active regions are then patterned using the recessed alignment mark in the kerf region.