The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Dec. 20, 2019
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Jiann-Horng Lin, Hsinchu, TW;

Yi-Chang Lee, Taoyuan, TW;

Che-Kang Chu, New Taipei, TW;

Chih-Hao Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0337 (2013.01); H01L 21/0332 (2013.01); H01L 21/0338 (2013.01); H01L 21/31144 (2013.01);
Abstract

An embodiment is a method of fabricating a semiconductor structure. The method includes utilize uses of a multi-layer structure disposed on a pattern defining layer. In some embodiments, a method of fabricating a semiconductor structure includes forming a first multi-layer structure on a pattern defining layer disposed on a film stack on a substrate, patterning the first multi-layer structure to form an aperture in the first multi-layer structure, forming a first cut opening in the pattern defining layer through the aperture defined by the first multi-layer structure, and forming a second multi-layer structure on the pattern defining layer, a portion of the second multi-layer structure being disposed in the first cut opening.


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