The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Jun. 29, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Nadav Bonen, Ofer Z, IL;

Julius Mandelblat, Haifa, IL;

Nir Sucher, Tel Aviv, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/08 (2016.01); G06F 13/00 (2006.01); G06F 3/06 (2006.01); G06F 13/40 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/065 (2013.01); G06F 3/0619 (2013.01); G06F 3/0625 (2013.01); G06F 3/0644 (2013.01); G06F 3/0647 (2013.01); G06F 3/0673 (2013.01); G06F 13/1668 (2013.01); G06F 13/4068 (2013.01);
Abstract

One embodiment provides an apparatus. The apparatus includes first memory controller circuitry to control read and/or write access to first memory circuitry via a first conductive bus. The apparatus includes second memory controller circuitry to control read and/or write access to second memory circuitry via a second conductive bus. The apparatus includes power control circuitry coupled to the first memory controller circuitry and the second memory controller circuitry. The power control circuitry transfers data from the second memory circuitry with the second memory controller circuitry via the second conductive bus to the first memory circuitry with the first memory controller circuitry via the first conductive bus. The power control circuitry powers down the second memory circuitry after the transfer of the data from the second memory circuitry to the first memory circuitry. The power control circuitry decreases power consumption of the apparatus and may increase batter life of the apparatus.


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