The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2020
Filed:
May. 17, 2018
Applicant:
Micron Technology, Inc., Boise, ID (US);
Inventors:
Suresh Rajgopal, San Diego, CA (US);
Henrico L. Yahja, Gold River, CA (US);
Steven Eskildsen, Boise, ID (US);
Dustin J. Carter, Placerville, CA (US);
Assignee:
Micron Technology, Inc., Boise, ID (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0635 (2013.01); G06F 3/0604 (2013.01); G06F 3/0658 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01);
Abstract
A selection device can be operatively coupled with non-volatile memory devices. Enable signals that are based on an architecture of non-volatile memory devices can be received. Data can be transmitted to the non-volatile memory devices based on the enable signals that are based on the architecture of the non-volatile memory devices.
Quick Actions:
Rajgopal, Suresh. (2020). Selection component that is configured based on an architecture associated with memory devices (U.S. Patent No. 10877678). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10877678
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile