The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2020

Filed:

Jul. 05, 2018
Applicant:

Amazing Microelectronic Corp., New Taipei, TW;

Inventors:

James Jeng-Jie Peng, Taoyuan County, TW;

Woei-Lin Wu, Zhubei, TW;

Ryan Hsin-Chin Jiang, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/60 (2006.01); H01L 23/62 (2006.01); H01L 27/02 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H02H 9/046 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/5227 (2013.01); H01L 23/5228 (2013.01); H01L 23/60 (2013.01); H01L 23/62 (2013.01); H01L 27/0255 (2013.01); H01L 27/0288 (2013.01); H01L 27/0292 (2013.01); H01L 28/10 (2013.01); H01L 28/20 (2013.01);
Abstract

An on-chip multiple-stage electrical overstress (EOS) protection device is disclosed. The protection device includes a surge protector having a first clamping voltage and a first electrostatic discharge (ESD) protector having a second clamping voltage lower than the first clamping voltage. The surge protector is electrically connected to the first ESD protector in parallel. The surge protector and the first ESD protector are electrically connected between a receiving terminal and a voltage terminal, and the receiving terminal is electrically connected to an internal circuit. When an electrical overstress (EOS) signal including an electrostatic discharge (ESD) signal and a surge signal appears at the receiving terminal, the first ESD protector and the surge protector are triggered on in turn to clamp a voltage received by the internal circuit.


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