The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 2020
Filed:
Sep. 29, 2017
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd.;
Inventors:
Po-Lin Peng, Taoyuan, TW;
Li-Wei Chu, Hsinchu, TW;
Yi-Feng Chang, Xinbei, TW;
Jam-Wem Lee, Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01); H01L 27/02 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0251 (2013.01); H01L 21/823418 (2013.01); H01L 27/027 (2013.01); H01L 27/0248 (2013.01);
Abstract
An integrated circuit device with ESD protection includes a substrate with a well having a first conductivity type formed on the substrate. A drain region has at least one drain diffusion with a second conductivity type implanted in the well and at least one drain conductive insertion on the well. The drain conductive insertion is electrically connected to the drain diffusion and an I/O pad. A source region includes a plurality of source diffusions having the second conductivity type implanted in the well, and the source diffusions are electrically connected to a voltage terminal.