The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2020
Filed:
Apr. 15, 2020
University of Electronic Science and Technology of China, Chengdu, CN;
Zekun Zhou, Chengdu, CN;
Jianwen Cao, Chengdu, CN;
Zhuo Wang, Chengdu, CN;
He Tang, Chengdu, CN;
Bo Zhang, Chengdu, CN;
UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA, Chengdu, CN;
Abstract
A level shifter includes a power supply rail conversion block, an RS latch and a digital detection block. The power supply rail conversion block comprises a first NLDMOS transistor, a second NLDMOS transistor, a first PLDMOS transistor, a second PLDMOS transistor, a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a first inverter. A gate of the first NLDMOS transistor is connected to an input of the first inverter, a drain of the first NLDMOS transistor is connected to a drain of the first PLDMOS transistor; a source of the first NLDMOS transistor and a source of the second NLDMOS are connected to a referenced ground of an LV power supply rail. The digital detection block comprises a second inverter, a third inverter, a first delay chain, a second delay chain, a first NAND gate and a second NAND gate.